Everyone want to increase the speed of computers that consume less and less energy. For designing such computers of the future, it is important to be able to control nanoscale strain in the processors.
We have to give thanks to a new electron holography technique invented by researchers at the CEMES- CNRS, it is possible to map deformation in a crystal lattice with a precision and resolution never previously attained. This new patented measurement device removes nearly all the limitations of current methods and it should enable manufacturers to improve microprocessor production methods and to optimize future computers.
“Strained” silicon is a basic component of all recent microprocessors because local strain-induced deformation in the crystal lattice improves processor performance. The deformation increases electron mobility, making it possible to boost computer speed and reduce energy consumption. Manufacturers could not analyze deformation accurately, so they didn’t have complete mastery of chip design. But they relied on simulations and monitoring of performance without knowing the strain state. This problem has now been solved, and thanks to a new strain measurement method developed by a CNRS team.
This technique is based on electron holography (technique for measuring magnetic and electric fields), it makes it possible to measure deformation (compression, tension, and shear strain) in numerous materials with high precision and spatial resolution. Real innovation compared to traditional techniques that makes it possible to analyze a micrometer area rather than the previous 100 nanometers with a level of precision never reached before.